A flip-chip packaging technique with submicron alignment precision, using V-grooved Si motherboards, allows the realization of OEIC modules with self-aligned coupling of single mode fiber arrays to waveguide arrays together with direct optical connection of different, separately optimized waveguide devices. The passive optical self-alignment of array interconnections combined with the relatively large mounting and etching tolerances of the Si motherboard is promising as a generally useful, high precision, low cost packaging technique for OEICs.


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    Title :

    Low-loss, self-aligned flip-chip technique for interchip and fiber array to waveguide OEIC packaging


    Contributors:
    Hunziker, W. (author) / Vogt, W. (author) / Hess, R. (author) / Melchior, H. (author)

    Published in:

    Proceedings of LEOS'94 ; 2 ; 269-270 vol.2


    Publication date :

    1994-01-01


    Size :

    324993 byte




    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English



    Low-Loss, Self-Aligned Flip-Chip Technique for Interchip and Fiber Array to Waveguide OEIC Packaging

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