Modification of decoding algorithms leads to simplified conceptual designs for time- and transform-domain Reed-Soloman (RS) decoders suitable for implementation as very-large-scale integrated (VLSI) circuits. New conceptual decoders determine simultaneously errata-locator and errata-evaluator polynomials as part of simplified scheme for corrections of errors and erasures in RS codes. Highly suitable for implementation in both VLSI circuitry and in software on general-purpose computer.


    Access

    Access via TIB

    Check availability in my library


    Export, share and cite



    Title :

    Pipeline Time- And Transform-Domain Reed-Solomon Decoders


    Contributors:

    Published in:

    Publication date :

    1990-05-01



    Type of media :

    Miscellaneous


    Type of material :

    No indication


    Language :

    English





    Joint Synchronization Of Viterbi And Reed-Solomon Decoders

    Statman, Joseph I. / Chauvin, Todd H. / Cheung, Kar-Ming et al. | NTRS | 1995


    Real-Time Reed-Solomon Decoder

    Online Contents | 1994


    Real-Time Reed-Solomon Decoder

    Maki, Gary K. / Cameron, Kelly B. / Owsley, Patrick A. | NTRS | 1994


    Fast Transform Decoding Of Nonsystematic Reed-Solomon Codes

    Truong, Trieu-Kie / Cheung, Kar-Ming / Shiozaki, A. et al. | NTRS | 1992