Random-fault densities measured in array of standard structures. Test pattern is array of standard circuit elements built into circuit chip along with, or in lieu of, integrated circuit objective process. Measurements on ray made and interpreted so fabrication process can be corrected as necessary.


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    Title :

    Test Pattern for IC's


    Contributors:

    Published in:

    Publication date :

    1983-10-01



    Type of media :

    Miscellaneous


    Type of material :

    No indication


    Language :

    English




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