Random-fault densities measured in array of standard structures. Test pattern is array of standard circuit elements built into circuit chip along with, or in lieu of, integrated circuit objective process. Measurements on ray made and interpreted so fabrication process can be corrected as necessary.
Test Pattern for IC's
NASA Tech Briefs ; 7 , 4
1983-10-01
Miscellaneous
No indication
English
British Library Online Contents | 1992
Automated ion implantation for IC's
NTRS | 1980
|Photonitride passivating coating for IC's
NTRS | 1980
|NTRS | 1978
|