Heavy-ion test results utilizing novel test methodologies of non-volatile antifuse-based FPGAs are presented and discussed. In particular, the programmable architectures in the RTAX-S FPGA-family including the I/O structures, and the FPGA core were tested and their cross-sections measured. Previously available SET mitigation solution based on SET filtering was implemented on the RTAX-S test designs and their efficacy proven to reduce the saturation cross-section and increase the LET threshold of the mitigated test designs.


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    Title :

    SET characterization and mitigation in RTAX-S antifuse FPGAs


    Contributors:


    Publication date :

    2009-03-01


    Size :

    883991 byte





    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English



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