Heavy-ion test results utilizing novel test methodologies of non-volatile antifuse-based FPGAs are presented and discussed. In particular, the programmable architectures in the RTAX-S FPGA-family including the I/O structures, and the FPGA core were tested and their cross-sections measured. Previously available SET mitigation solution based on SET filtering was implemented on the RTAX-S test designs and their efficacy proven to reduce the saturation cross-section and increase the LET threshold of the mitigated test designs.


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    Titel :

    SET characterization and mitigation in RTAX-S antifuse FPGAs


    Beteiligte:
    Rezgui, Sana (Autor:in) / Wang, J.J. (Autor:in) / Sun, Yinming (Autor:in) / D'Silva, Durwyn (Autor:in) / Cronquist, Brian (Autor:in) / McCollum, John (Autor:in)

    Erschienen in:

    Erscheinungsdatum :

    2009-03-01


    Format / Umfang :

    883991 byte





    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



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