The proposed technology has seen several recent techniques aimed at reducing power consumption while maintaining or improving performance. The challenges faced by systems employing them are Near-Threshold Voltage (NTV) Operation which performance maintenance can be difficult due to increased susceptibility to process variations, Adaptive Voltage Scaling (AVS) which ensures seamless voltage transitions without compromising reliability. The technology's design objective is to improve force distribution and postpone force decay as supply voltage declines and temperatures rise. Reconstruction is performed using multiple domino theory on the 7nm technology core of the FinFET record using a multi-gate prediction model. The objective of the proposed work is to strike a balance between power, performance, and functionality, ultimately leading to more sustainable, cost-effective, and environmentally friendly electronic devices and systems. This objective is of paramount importance in an increasingly connected and energy-conscious world. In comparison to the present mirror foot domino, fast time delay, and fast time delay suited to a particular range of temperature and supply voltage, the suggested set/reset theoretical circuit and rapid overflow circuit approach have lower power consumption and delay. When compared to existing methods, the performance loss from the suggested method is the greatest. Comparing the suggested method to existing ones, displacement and range reduction are maximised.


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    Title :

    Energy-Efficient Digital Circuit Design and Optimization Utilizing FinFET Technology


    Contributors:


    Publication date :

    2023-11-22


    Size :

    599719 byte




    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English



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