Disclosed are emulator architectures for steer-by-wire (SBW) vehicle systems, methods for making and for using such systems, and programmable control logic for operating emulator test systems. A method is disclosed for operating an emulator test system for motor vehicle SBW systems. The method includes a Central Processing Unit Workstation Controller (CWC) initiating a selected test procedure for the SBW system, and transmitting, to a Motor Controller (MC) of the test system, a target input curve corresponding to the initiated test procedure. The MC responsively commands a Driver Simulator Motor (DSM) to operate at a power input corresponding to the target input curve. An emulator, which is mechanically coupled to the DSM, transmits emulator state data resulting from operating the DSM to a Real-time Operating System (RTOS). The RTOS determines a vehicle response based on the emulator state data using a vehicle dynamics math model corresponding to the SBW system.


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    Title :

    Emulator hardware-in-loop architecture and control logic for vehicle steer-by-wire test system


    Contributors:

    Publication date :

    2019-11-26


    Type of media :

    Patent


    Type of material :

    Electronic Resource


    Language :

    English


    Classification :

    IPC:    G06F ELECTRIC DIGITAL DATA PROCESSING , Elektrische digitale Datenverarbeitung / B62D MOTOR VEHICLES , Motorfahrzeuge / G01M TESTING STATIC OR DYNAMIC BALANCE OF MACHINES OR STRUCTURES , Prüfen der statischen oder dynamischen Massenverteilung rotierender Teile von Maschinen oder Konstruktionen / G07C TIME OR ATTENDANCE REGISTERS , Zeit- oder Anwesenheitskontrollgeräte



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