Disclosed are emulator architectures for steer-by-wire (SBW) vehicle systems, methods for making and for using such systems, and programmable control logic for operating emulator test systems. A method is disclosed for operating an emulator test system for motor vehicle SBW systems. The method includes a Central Processing Unit Workstation Controller (CWC) initiating a selected test procedure for the SBW system, and transmitting, to a Motor Controller (MC) of the test system, a target input curve corresponding to the initiated test procedure. The MC responsively commands a Driver Simulator Motor (DSM) to operate at a power input corresponding to the target input curve. An emulator, which is mechanically coupled to the DSM, transmits emulator state data resulting from operating the DSM to a Real-time Operating System (RTOS). The RTOS determines a vehicle response based on the emulator state data using a vehicle dynamics math model corresponding to the SBW system.
EMULATOR HARDWARE-IN-LOOP ARCHITECTURE AND CONTROL LOGIC FOR VEHICLE STEER-BY-WIRE TEST SYSTEM
2018-10-25
Patent
Electronic Resource
English
Emulator hardware-in-loop architecture and control logic for vehicle steer-by-wire test system
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