A field programmable gate array (FPGA) (10) having at least first (12) and second (14) processing circuits implemented thereon. Each of the first and second processing circuits comprises a numerical core (121, 141) and associated peripheral components. The numerical core (121) in the first processing circuit is dissimilar to the numerical core (141) in the second processing circuit. The first and second processing circuits (12, 14) are segregated from each other in floorplan view.


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    Title :

    FIELD PROGRAMMABLE GATE ARRAY (FPGA) HAVING DISSIMILAR CORES


    Additional title:

    MATRICE PREDIFFUSEE PROGRAMMABLE PAR L`UTILISATEUR (FPGA) AYANT DES COEURS DISSEMBLABLES


    Contributors:

    Publication date :

    2021-01-12


    Type of media :

    Patent


    Type of material :

    Electronic Resource


    Language :

    English


    Classification :

    IPC:    H03K PULSE TECHNIQUE , Impulstechnik / B64C AEROPLANES , Flugzeuge / G06F ELECTRIC DIGITAL DATA PROCESSING , Elektrische digitale Datenverarbeitung



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