A field programmable gate array (FPGA) (10) having at least first (12) and second (14) processing circuits implemented thereon. Each of the first and second processing circuits comprises a numerical core (121, 141) and associated peripheral components. The numerical core (121) in the first processing circuit is dissimilar to the numerical core (141) in the second processing circuit. The first and second processing circuits (12, 14) are segregated from each other in floorplan view.
FIELD PROGRAMMABLE GATE ARRAY (FPGA) HAVING DISSIMILAR CORES
MATRICE PREDIFFUSEE PROGRAMMABLE PAR L`UTILISATEUR (FPGA) AYANT DES COEURS DISSEMBLABLES
12.01.2021
Patent
Elektronische Ressource
Englisch
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