An efficient carry-free addition and borrow-free subtraction of modified signed-digit trinary number scheme is presented which may be used for parallel computing application. A digital 2 bit prototype adder was designed and implemented using electrically programmable logic device (EPLD).<>


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    Titel :

    Efficient electronic implementation of modified signed-digit trinary carry free adder


    Beteiligte:
    Hossain, M.M. (Autor:in) / Ahmed, J.U. (Autor:in) / Awwal, A.A.S. (Autor:in)


    Erscheinungsdatum :

    01.01.1993


    Format / Umfang :

    277529 byte




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



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