A multibit quaternary full adder is designed using a restricted set of modified signed-digit quaternary number system; Such adders could be stacked in parallel and they can add two n-bit numbers in a constant time irrespective of the operand size. An optical nonholographic content addressable memory is proposed for implementing the adder.<>
Two-bit restricted signed-digit quaternary full adder
Proceedings of National Aerospace and Electronics Conference (NAECON'94) ; 1119-1125 vol.2
01.01.1994
355229 byte
Aufsatz (Konferenz)
Elektronische Ressource
Englisch
Two-Bit Restricted Signed-Digit Quaternary Full Adder
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