Clock-Gating Approach to Low Power Domino Circuit Synthesis
International journal of computers and applications ; 36 , 4 ; 140-147
01.01.2014
8 pages
Aufsatz (Zeitschrift)
Englisch
DDC: | 004.05 |
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Clock-gating Approach to Low Power Domino Circuit Synthesis
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Europäisches Patentamt | 2025
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