An architecture has been developed for a high performance VLSI digital signal processor that is highly reliable, fault tolerant and radiation hard. The signal processor, part of a spacecraft receiver designed to support uplink radio science experiments at the outer planets, organizes the connections between redundant arithmetic resources, register files and memory through a shuffle exchange communication network. The configuration of the network and the state of the processor resources are all under microprogram control which both maps the resources according to algorithmic needs and reconfigures the processing should a failure occur. In addition, the microprogram is reloadable through the uplink to accommodate changes in the science objectives throughout the course of the mission. The processor will be implemented with silicon compiler tools and its design will be verifed through silicon compilation simulation at all levels from the resources to full functionality. By blending reconfiguration with redundancy the processor implementation is fault tolerant, reliable and possesses the long expected lifetime needed for a spacecraft mission to the outer planets.
Fault tolerant, radiation hard, high performance digital signal processor
Fehlertoleranter, strahlungsfester, hochleistungsfähiger digitaler Signalprozessor
1990
6 Seiten, 6 Bilder, 1 Tabelle, 8 Quellen
Conference paper
English
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