Investigates the mathematical models which have been developed for such circuits and the asymptotic behavior (with m=infinity) of the maximal complexity of optimal circuits realizing functions of logic algebra on m variables; give comparative data on the modeling of CMOS circuits by known types of circuit (contact, functional relay-contact). Analysis of the estimates of the Shannon functions corresponding to various synthesis methods shows that for most Boolean functions with very many variables, the most advantageous method is synthesis based on modeling of CMOS circuits by relay-contact circuits. The methods of p and n modeling presented allow one to reduce the number of transistors by almost twofold in comparison with conventional synthesis methods (for a quite large number of variables). The p modeling method in practice turns out to be preferable, since circuits constructed by this method contain only two n-type transistors while the others are p-type triodes. It is known that the preparation of n type triodes is more complicated and less reliable.


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    Title :

    Methods for logical design and estimation of the circuit complexity for CMOS circuits


    Additional title:

    Einbruchsalarm fuer das Auto


    Contributors:

    Published in:

    Soviet Microelectronics ; 12 , 1 ; 29-34


    Publication date :

    1983


    Size :

    6 Seiten, 7 Quellen


    Type of media :

    Article (Journal)


    Type of material :

    Print


    Language :

    English





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