Proposed fast, massively parallel data processor contains 8x16 array of processing elements with efficient interconnection scheme and options for flexible local control. Processing elements communicate with each other on "X" interconnection grid with external memory via high-capacity input/output bus. This approach to conditional operation nearly doubles speed of various arithmetic operations.


    Access

    Access via TIB

    Check availability in my library


    Export, share and cite



    Title :

    Fast, Massively Parallel Data Processors


    Contributors:

    Published in:

    Publication date :

    1994-08-01



    Type of media :

    Miscellaneous


    Type of material :

    No indication


    Language :

    English







    The Massively Parallel Processor

    D.H. Schaefer / J.R. Fischer / K.R. Wallgren NASA Goddard Space Flight Center et al. | AIAA | 1982


    Massively Parallel Binary Manipulators

    Mukherjee, S. | Online Contents | 2001