The work performed entailed the design, development, construction and testing of a 4000 word by 18 bit random access, NDRO plated wire memory for use in conjunction with a spacecraft imput/output unit and central processing unit. The primary design parameters, in order of importance, were high reliability, low power, volume and weight. A single memory unit, referred to as a qualification model, was delivered.


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    Title :

    Plated wire memory subsystem


    Contributors:
    Reynolds, L. (author) / Tweed, H. (author)

    Publication date :

    1972-05-01


    Type of media :

    Report


    Type of material :

    No indication


    Language :

    English


    Keywords :


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