A high speed programmable processor for satellite onboard image and signal processing and computation was developed. The architecture is an attempt to define a single programmable product which can efficiently replace dedicated logic for real-time on-board functions. Hardware, programming rules, definition of a flight model, evaluation through a specific application, and analysis of other typical applications are considered. State of the art and directions for future developments are discussed.
High Speed Programmable Processor for Use on Board Satellites
1985
92 pages
Report
No indication
English
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