Tens of terabits-per-second bandwidth will be required for revolutionary chip-multithreading (CMT) architectures. In this presentation, we will review the technical challenges for electrical signaling and discuss how parallel optical interconnects could be valuable in CMT architectures.


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    Title :

    The chip-multithreading architecture and parallel optical interconnects


    Contributors:
    Huang, D. (author) / Sze, T. (author) / Krishnamoorthy, A.V. (author) / Alamo, A.D. (author) / Beckman, D. (author) / Fazelpour, S. (author) / Davidson, H. (author) / Cooley, J. (author) / Lytel, R. (author)


    Publication date :

    2004-01-01


    Size :

    156999 byte





    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English




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