A familiar two-transistor saturable-core parallel inverter is modeled as a nonlinear negative resistance in parallel with energy-storage elements. The techniques of singular-point analysis are combined with piecewise linear techniques to permit determination of solution trajectories on the phase plane. Clear insight is provided, not only into steady-state oscillation, but also into transient behavior of the circuit. Experimental results confirming the analytical model are included.


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    Title :

    Analysis of Limit Cycles in a Two-Transistor Saturable-Core Parallel Inverter


    Contributors:


    Publication date :

    1973-07-01


    Size :

    4403963 byte




    Type of media :

    Article (Journal)


    Type of material :

    Electronic Resource


    Language :

    English