In this paper an analysis of the effects of integrated circuit packaging substrates on a radio frequency (RF) IC is presented. At RF frequencies the effects of packaging parasitics become crucial when assembling an RF system in package (SiP) or integrating a single die with a package. A differential buffer, which had been previously fabricated in a 90nm CMOS process is used as a vehicle to analyze the effects of packaging on performance. The integration of the buffer die with the package is modeled and analyzed.
Modeling and simulation of packaging substrate effects on radio frequency integrated circuits
2012-07-01
1630417 byte
Conference paper
Electronic Resource
English
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