In this paper an analysis of the effects of integrated circuit packaging substrates on a radio frequency (RF) IC is presented. At RF frequencies the effects of packaging parasitics become crucial when assembling an RF system in package (SiP) or integrating a single die with a package. A differential buffer, which had been previously fabricated in a 90nm CMOS process is used as a vehicle to analyze the effects of packaging on performance. The integration of the buffer die with the package is modeled and analyzed.


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    Title :

    Modeling and simulation of packaging substrate effects on radio frequency integrated circuits


    Contributors:
    Benedik, Chris (author) / Ren, Saiyu (author)


    Publication date :

    2012-07-01


    Size :

    1630417 byte





    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English




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