The paper proposes a new design of Global Positioning System (GPS) signal acquisition engine - a critical and the most time consuming block of any GPS receiver - based on fast time domain circular correlator. The efficient implementation of design on powerful Virtex 5 Field Programmable Gate Array (FPGA) is the main focus of the paper. The architecture GP2021, a discontinued GPS correlator IC, serves as partial reference of our approach. The results show the significant reduction not only in the FPGA resources but also improvement in the signal acquisition time from seconds to milliseconds.


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    Title :

    Fast approach to GPS Signal Acquisition in Future GPS Receivers


    Contributors:


    Publication date :

    2013-06-01


    Size :

    1003991 byte




    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English



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