The contribution deals with the real time hardware implementation of the video compression algorithms. The real time media TM-1300 IREF PCI bus board used for research and education in Laboratory of television technique and video technique FEEC BUT is introduced. The different standards used for coding audio-visual information in a digital compressed format are presented in this paper too. Besides the MPEG family standards and the wavelet-based compression, the 3D-DCT transform is outline as well.


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    Title :

    Video compression hardware implementation using programmable media processor


    Contributors:
    Kratochvil, T. (author) / Fryza, T. (author)


    Publication date :

    2003-01-01


    Size :

    305114 byte




    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English



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