The contribution deals with the real time hardware implementation of the video compression algorithms. The real time media TM-1300 IREF PCI bus board used for research and education in Laboratory of television technique and video technique FEEC BUT is introduced. The different standards used for coding audio-visual information in a digital compressed format are presented in this paper too. Besides the MPEG family standards and the wavelet-based compression, the 3D-DCT transform is outline as well.
Video compression hardware implementation using programmable media processor
01.01.2003
305114 byte
Aufsatz (Konferenz)
Elektronische Ressource
Englisch
Video Compression Hardware Implementation using Programmable Media Processor
British Library Conference Proceedings | 2003
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