This study explores multi-drop interconnections over point to point interconnections. However, high data rate point-to-point electrical transmission lines make multi-drop interconnections very difficult to implement at high speeds. For high speed multi-drop processor to memory interconnections, this paper proposes that optical interconnections offer a simple procedure to design and implement alternative to point to point electrical interconnections. The design complexity of these optical interconnections is similar to lower speed multi-drop electrical interconnections that are currently the dominant architectural implementation in current computing systems.


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    Title :

    Optical chip-to-chip interconnects for memory systems


    Contributors:
    Bourdreaux, O. (author) / Sang-Yeon Cho, (author) / Jaemin Shin, (author) / Chellappa, A. (author) / Schimmel, D. (author) / Brooke, M. (author) / Jokerst, N.M. (author)


    Publication date :

    2003-01-01


    Size :

    161770 byte





    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English



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