With the onset of multi-core chips, the single-core market is closing down. Developing avionics systems hosted on multi-core chips that enforce safety-criticality constraints constitutes a challenge for the aerospace industry. This paper presents a reconfigurable multi-core architecture and studies its suitability for hosting safety-critical embedded applications. A task allocation algorithm for this specific architecture is proposed, and the last section demonstrates its behavior and analyzes its efficiency.


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    Title :

    Task allocation of safety-critical applications on reconfigurable multi-core architectures


    Contributors:


    Publication date :

    2017-09-01


    Size :

    1018041 byte





    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English




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