With the onset of multi-core chips, the single-core market is closing down. Developing avionics systems hosted on multi-core chips that enforce safety-criticality constraints constitutes a challenge for the aerospace industry. This paper presents a reconfigurable multi-core architecture and studies its suitability for hosting safety-critical embedded applications. A task allocation algorithm for this specific architecture is proposed, and the last section demonstrates its behavior and analyzes its efficiency.


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    Titel :

    Task allocation of safety-critical applications on reconfigurable multi-core architectures


    Beteiligte:
    Guillaumet, Tom (Autor:in) / Feron, Eric (Autor:in) / Baufreton, Philippe (Autor:in) / Neumann, Francois (Autor:in) / Madhu, Kavitha (Autor:in) / Krishna, Madhava (Autor:in) / Nandy, S. K. (Autor:in) / Narayan, Ranjani (Autor:in) / Haldar, Chandan (Autor:in)


    Erscheinungsdatum :

    01.09.2017


    Format / Umfang :

    1018041 byte





    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch




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