Multi-core processors pervade numerous industries but they still represent a challenge for the aerospace industry, where strong certification of every components is required. One way to make them enforce safety-criticality constraints is to ensure reallocation of critical tasks on the chip when they are affected by hardware faults. This paper describes and compares different models of a task reallocation problem for a reconfigurable multi-core architecture. It also presents the first version of the macroscopic model made of Raspberry Pi that was built to represent the multi-core architecture and to test the task allocation algorithm on an actual system, showing the increased robustness that the reallocation algorithm enables while cores are made faulty.


    Zugriff

    Zugriff prüfen

    Verfügbarkeit in meiner Bibliothek prüfen

    Bestellung bei Subito €


    Exportieren, teilen und zitieren



    Titel :

    Experimental Allocation of Safety-Critical Applications on Reconfigurable Multi-Core Architecture


    Beteiligte:


    Erscheinungsdatum :

    01.09.2018


    Format / Umfang :

    3034542 byte





    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



    Task allocation of safety-critical applications on reconfigurable multi-core architectures

    Guillaumet, Tom / Feron, Eric / Baufreton, Philippe et al. | IEEE | 2017


    Fault Assessment of Safety-Critical Applications on Reconfigurable Multi-Core Architecture

    Khamvilai, Thanakorn / Sutter, Louis / Junior, Jose M. Magalhaes et al. | IEEE | 2019



    Using reconfigurable multi-core architectures for safety-critical embedded systems

    Guillaumet, Tom / Sharma, Aayush / Feron, Eric et al. | IEEE | 2016


    A Fault-Tolerant Processor Core Architecture for Safety-Critical Automotive Applications

    Touloupis, E. / Flint, J. A. / Chouliaras, V. A. et al. | British Library Conference Proceedings | 2005