The 3D-OESP Consortium is a government-industry-university collaboration dedicated to the development of the technologies required to integrate stacked silicon chips with optoelectronic devices for high-performance computing and switching applications.


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    Title :

    Packaging optoelectronic stacked processors and free-space optical interconnects


    Contributors:
    Esener, S. (author) / Marchand, P. (author) / Ozguz, V. (author) / Liu, Y. (author) / Huang, D. (author) / Zheng, X. (author)


    Publication date :

    1999-01-01


    Size :

    219055 byte





    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English




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