An exact mathematical model is developed for a discrete loop of a general order particularly suitable for digital computation. The deterministic response of the loop to the phase step and the frequency step is investigated. The design of the digital filter for the second-order loop is considered. Use is made of the incremental phase plane to study the phase error behavior of the loop. The model of the noisy loop is derived and the optimization of the loop filter for minimum mean-square error is considered.
On Higher Order Discrete Phase-Locked Loops
IEEE Transactions on Aerospace and Electronic Systems ; AES-8 , 5 ; 615-623
1972-09-01
1789358 byte
Article (Journal)
Electronic Resource
English
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