This paper provides a fundamental overview of important metrics and concepts regarding A/D nonlinear distortion. Once reviewed, a sub-bit compensation technique is presented, analyzed, and simulated in the context of a high-speed flash converter. A model is presented to represent the compensator as well as the pre-compensated converter. It is shown that the BEET method of error compensation creates a greater SFDR and SINAD for a converter than traditional error-table compensation. Yet, the BEET method has only a slight increase in hardware complexity compared to traditional error tables.
A model for flash analog-to-digital converters with bit-extended error table linearization
2010-07-01
689216 byte
Conference paper
Electronic Resource
English
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