The adoption of multi-core processors in airborne safety-critical systems has been troublesome to the aeronautic industry. This type of processor inserts new sources of non-determinism on application execution, increasing difficulty to perform safety analysis that relies on Worst-Case Execution Time (WCET). Design recommendations to mitigate non-determinism in airborne multi-core systems are presented in this work. A prototype of platform was constructed in order to demonstrate feasibility of non-determinism mitigation recommendations. We utilized the prototype to experiment with parallel memory access. The recommendations are a sound basis to allow multi-core processors to be used in airborne systems, however, some changes are required.


    Access

    Check access

    Check availability in my library

    Order at Subito €


    Export, share and cite



    Title :

    Design recommendations to mitigate memory and cache non-determinisms in multi-core based IMA platform of airborne systems




    Publication date :

    2015-09-01


    Size :

    765541 byte




    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English



    Design recommendations for the development of airborne multi-core systems

    Domingues, Rafael Pelegrini / Bezerra, Juliana de Melo / Hirata, Celso Massaki | IEEE | 2015

    Free access

    Commercial Airborne Radar Evaluation & Recommendations

    George Szatkowski / Larry Ticatch / Christopher Morris et al. | NTRS


    Commercial Airborne Radar Evaluation & Recommendations

    G. Szatkowski / L. Ticatch / C. Morris et al. | NTIS | 2021


    AIRBORNE PLATFORM

    COSTA DUARTE PARDAL TIAGO / MARQUES DOS SANTOS SILVA PEDRO MIGUEL | European Patent Office | 2019

    Free access

    AIRBORNE PLATFORM

    PARDAL TIAGO COSTA DUARTE / SILVA PEDRO MIGUEL MARQUES DOS SANTOS | European Patent Office | 2017

    Free access