An avionics system comprising a central processing unit to implement one or more hard real-time safety-critical applications, the central processing unit comprises a multi-core processor with a plurality of cores, an avionics system software executable by the multi-core processor, a memory, and a common bus though which the multi-core processor can access the memory; the avionics system is characterized in that the avionics system software is designed to cause, when executed, the cores in the multi-core processor to access the memory through the common bus by sharing bus bandwidth according to assigned bus bandwidth shares.


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    Title :

    CERTIFIABLE DETERMINISTIC SYSTEM SOFTWARE FRAMEWORK FOR HARD REAL-TIME SAFETY-CRITICAL APPLICATIONS IN AVIONICS SYSTEMS FEATURING MULTI-CORE PROCESSORS


    Contributors:

    Publication date :

    2019-11-07


    Type of media :

    Patent


    Type of material :

    Electronic Resource


    Language :

    English


    Classification :

    IPC:    G06F ELECTRIC DIGITAL DATA PROCESSING , Elektrische digitale Datenverarbeitung / B64C AEROPLANES , Flugzeuge