Disclosed are an interlocking data safe conversion method for formal verification and a translator. Two translators with same functions are developed by adopting different programming methods and programming languages. An input file of each of the translators at least comprises an interlocking information table in interlocking data, a device interface information table, a station yard description data and interlocking Boolean logic data. Consistency of output files of the two translators is compared to realize detection process failure, so that safe conversion of data is guaranteed. It is unnecessary to perform specific formal development for each station, so that the technical cost and the design risk are reduced, and the present invention is high in safety, good in compatibility, high in universality and wide in application range.


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    Title :

    SAFE INTERLOCKING DATA CONVERSION METHOD FOR FORMAL VERIFICATION AND TRANSLATOR


    Additional title:

    VERFAHREN ZUR VERSCHACHTELTEN DATENSICHERUNG FÜR FORMALE VERIFIZIERUNG UND ÜBERSETZUNG
    PROCÉDÉ DE CONVERSION DE DONNÉES À VERROUILLAGE SÉCURISÉ POUR VÉRIFICATION FORMELLE ET TRADUCTEUR


    Contributors:
    WEI MIN (author) / WANG YANQIN (author) / ZHANG MINGYAO (author) / WANG SHAOXIN (author) / YANG FAN (author) / LIU XIAO (author) / ZHANG CHENG (author) / ZHANG WENYAN (author)

    Publication date :

    2023-12-27


    Type of media :

    Patent


    Type of material :

    Electronic Resource


    Language :

    English


    Classification :

    IPC:    G06F ELECTRIC DIGITAL DATA PROCESSING , Elektrische digitale Datenverarbeitung / B61L Leiten des Eisenbahnverkehrs , GUIDING RAILWAY TRAFFIC



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