Preliminary report on program to design transistor register logic (TRL) circuits and compile TRL propagation delay tables on digital computer, presently in progress at Sylvania's Data Processing Laboratory; transistor and TRL circuit studies that have resulted in basic relationships being programmed.


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    Title :

    Analysis of transister-resister-logic circuit propagation delay


    Additional title:

    Sylvania Technologist


    Contributors:
    Dunnet, W.J. (author) / Auger, E.P. (author) / Scott, A.C. (author)

    Published in:

    Sylvania Technologist ; 12 , n 4 ; p 123-133


    Publication date :

    1959


    Size :

    11 pages


    Type of media :

    Article (Journal)


    Type of material :

    Print


    Language :

    English


    Keywords :


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