Access

    Access via TIB

    Check availability in my library

    Order at Subito €


    Export, share and cite



    Title :

    AIAA-2006-5465 Design Architecture of Long-Size LDPC Decoder Using the Partial Parallel Processing in the Digital Video Broadcasting by Satellite



    Conference:

    24th:; INTERNATIONAL CONFERENCE, Communications satellite systems; ICSSC ; 2006 ; San Diego, CA



    Publication date :

    2006-01-01


    Size :

    6 pages



    Type of media :

    Conference paper


    Type of material :

    Print


    Language :

    English





    AIAA-2002-5465 Hybrid Genetic Algorithms and Neural Networks for Fast CFD-Based Design

    Duvigneau, R. / Visonneau, M. / American Institute of Aeronautics and Astronautics et al. | British Library Conference Proceedings | 2002


    Memory optimized parallel LDPC decoder architecture design on GPU

    Shuai, G. / Rongke, L. / Yi, H. | British Library Online Contents | 2013



    High-Throughput FPGA-Based QC-LDPC Decoder Architecture

    Mhaske, Swapnil / Kee, Hojin / Ly, Tai et al. | IEEE | 2015