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    Title :

    FPGA Implementation of a FIR Filter Using Residue Arithmetic



    Conference:

    National aerospace and electronics conference ; 1996 ; Dayton; OH



    Publication date :

    1996-01-01


    Size :

    5 pages


    Remarks:

    Also known as NAECON 1996. IEEE Cat nos 96CH35934 and 96CB35934




    Type of media :

    Conference paper


    Type of material :

    Print


    Language :

    English




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