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    Titel :

    FPGA Implementation of a FIR Filter Using Residue Arithmetic



    Kongress:

    National aerospace and electronics conference ; 1996 ; Dayton; OH



    Erscheinungsdatum :

    01.01.1996


    Format / Umfang :

    5 pages


    Anmerkungen:

    Also known as NAECON 1996. IEEE Cat nos 96CH35934 and 96CB35934




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Print


    Sprache :

    Englisch




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