High density (HDI) electrical interconnections and vertical optoelectronic interconnections (OE) through-Si links for 3D computational systems have been modeled, and compared and contrasted in the areas of latency, size, and power dissipation. Based upon STA Roadmap projections, which indicate interconnection as a challenge area for coming generations of electronics, optoelectronics may serve a role in chip to chip interconnections for massively parallel computational systems.


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    Titel :

    A comparison of CMOS chip to chip interconnections: vertical optical through-Si links versus high density electrical interconnect


    Beteiligte:
    Brooke, M. (Autor:in) / Jokerst, N.K. (Autor:in) / Bond, S.W. (Autor:in) / Wills, D.S. (Autor:in)


    Erscheinungsdatum :

    01.01.1998


    Format / Umfang :

    310466 byte




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



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