Problem of elaborating a databank of testable digital elements, units and modules, which are most typical for digital systems, is considered. For this bank an original testable logical circuit of matrix binary multiplier, demanding small amount of hardware for its realization, is proposed.


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    Titel :

    A SUITABLE CONTROL SCHEME FOR THE BINARY MULTIPLIER DATA BANK OF VLSI CAD


    Beteiligte:


    Erscheinungsdatum :

    2009



    Medientyp :

    Aufsatz (Zeitschrift)


    Format :

    Elektronische Ressource


    Sprache :

    Unbekannt





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