This chapter presents the different topologies of bus‐based architectures and covers buses currently used in the computer industry. Initially, all the entities shared the same bus, called a “shared bus”, or “linear bus”, when there was only one bus connecting all of the subunits inside a computer. All sorts of information and signals would pass through this bus, at variable bitrates. The chapter discusses the multibus architecture, including segmented buses, hierarchical buses, and multiple buses. A bridge links two buses together. It can be as simple as a driver, which isolates and amplifies the signals. The chapter also introduces buses that are presented in the industry depending on their location in a digital system, including local buses, memory buses, link bus, expansion slot bus, expansion bus, input/output bus, and backplane and centerplane buses, field bus, and power bus.


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    Title :

    Bus Classifications


    Contributors:

    Published in:

    Publication date :

    2020-11-30


    Size :

    37 pages




    Type of media :

    Article/Chapter (Book)


    Type of material :

    Electronic Resource


    Language :

    English




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