The current trend in electronic design is moving toward digital and hybrid printed circuit boards (PCB) and away from analog printed circuit boards. The present PCBs utilizing very large scale integration (VLSI) are as complex as past systems. Using very high speed integrated circuits (VHSIC) or VLSI in a circuit makes the current in-circuit test concept impractical because a functional test capability, similar to that previously required for PCBs, is required at the chip interface. Digital IC fabrication technology has also doubled device IC density every year since 1960, as evidenced particularly by memory chips. By 1988, more than 50 percent of IC usage in new designs will be custom designed, the majority using either gate array or standard cell techniques. Many of the LSI PCBs require high speed or dynamic testing to operate because the processor and some support chips have minimum specified clock rates. It is also desirable during testing of the unit under test (UUT) to use the same clock rate as in actual use to get the best correlation of test results possible. The rapidly evolving digital technology makes it important to specify test equipment that is optimized for both performance and flexibility so that investments made in hardware and software will not become obsolete in a short period of time. This paper describes the design of a new digital pin electronics system, that provides the capability to test high-speed digital PCBs or systems.
High-speed digital test technology
Sehr schnelle digitale Prueftechnologie
1985
5 Seiten
Conference paper
English
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