The need for a configurable, high-performance family of computer 'building blocks' led to the design of a general purpose backplane architecture for the construction of processor systems to be used in oceanographic instrumentation. The architecture, called the 'Instrument Bus', includes a CMOS backplane based on the IEEE 796 (Multibus I) standard, along with a card rack structure and mechanical specification to fit the standard 6 ID. pressure case. A card set based on the 80C86 CPU was designed and implemented using this architecture. The set includes the CPU, 64k memory module, serial and parallel I/O, clock/timebase, counter/timer, and 16-bit A/D converter. The flexibility of the backplane specification accommodates a wide variety of CPU and I/O devices, and a wide range of resulting computer processing power. Designs scheduled for the near future include high speed (1 Mbit/sec) serial I/O, 68HC11 CPU, and a TMS 320-based numeric processing slave. Applications to a number of instrument design situations are discussed.
General purpose rack, backplane, and board set for in-situ oceanographic instrumentation
Universalgestellaufbau - und Kartensatz fuer einen oezanographischen In-Situ-Geraetepark
1986
5 Seiten, 2 Bilder, 9 Quellen
Conference paper
English
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