Design verification technology promises comprehensive analysis of design models against the specified properties, thereby overcoming the limitations of traditional simulation-based and testing-based approaches. It helps in detecting design bugs early, thereby reducing the software development cycle time and cost. In this paper, we present our experiences with three state-of-the-art design verification tools - Reactis Validator, Simulink Design Verifier and Embedded Validator - for Simulink/Stateflow models. We also identify some challenges in employing them in an industrial production environment. We also suggest some automation steps to ease the design verification effort.


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    Title :

    Applying Design Verification Tools in Automotive Software V&V


    Additional title:

    Sae Technical Papers


    Contributors:

    Conference:

    SAE 2011 World Congress & Exhibition ; 2011



    Publication date :

    2011-04-12




    Type of media :

    Conference paper


    Type of material :

    Print


    Language :

    English




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