In design concept for adaptive, fault-tolerant flight computer, upon detection of fault in either processor, surviving processor assumes responsibility for both equipment systems. Possible because of cross-strapping between processors, memories, and input/output units. Concept also applicable to other computing systems required to tolerate faults and in which partial loss of processing speed or functionality acceptable price to pay for continued operation in event of faults.
Fault-Tolerant Flight Computer
NASA Tech Briefs ; 20 , 4
1996-04-01
Miscellaneous
No indication
English
Fault-Tolerant Flight Computer
Online Contents | 1996
AIAA | 2003
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