Field programmable logic array (FPLA) is used to make 3-bit arithmetic logic unit (ALU) for large integrator that can be read and cleared while new data is added to begin new integral. Arrangement of device can provide for full carry/lookahead capability with minimum gate delays.


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    Title :

    Real-time digital integrator


    Contributors:
    Rubin, A. L. (author) / Taylor, H. (author) / Wallis, D. E. (author)

    Published in:

    Publication date :

    1980-06-01



    Type of media :

    Miscellaneous


    Type of material :

    No indication


    Language :

    English




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