Modified phase-locked loop (PLL) generates clock from incoming data signal. To minimize effects of threshold phase-detector gain variations, the PLL uses a dither oscillator, a dither band-pass filter, and correlator instead of coherent amplitude detector.


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    Title :

    Extrasensitive phase-locked-loop circuit


    Contributors:

    Published in:

    Publication date :

    1977-11-01



    Type of media :

    Miscellaneous


    Type of material :

    No indication


    Language :

    English




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