A reconfigurable hardware design permits very fast feature extraction from high frame rate video images. By implementing parallel pixel processing paths in programmable gate arrays, a wide range of image processing algorithms can be implemented in realtime.


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    Title :

    Parallel pixel processing using programmable gate arrays


    Contributors:
    Budgett, D.M. (author) / Tang, P.E. (author) / Sharp, J.H. (author) / Chatwin, C.R. (author) / Young, R.C.D. (author) / Wang, R.K. (author) / Scott, B.F. (author)

    Publication date :

    1996-08-15


    Size :

    3 pages



    Type of media :

    Article (Journal)


    Type of material :

    Print


    Language :

    English




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