Due to the globalization it is easy to pirate ICs, overbuild IC, and insert Trojan, etc. To protect industries from the illegal production, several methods have been introduced. Logic locking is a method, which locks the functionality of the circuits by using keys. In conventional logic locking method, a single key locks the circuit whereas in weighted logic method the circuit is locked by multiple keys instead of a single key. Normally at highest fault impact location, key gates are inserted, each key gate has corresponding key input. In this work, the comparison between the normal fault impact type insertion and weighted logic locking type insertion are presented. It is observed that there is an increase in the hamming distance (HD), which is the corruptibility of output. The weighted logic locking method which is immune to key sensitization attack and achieves 50% HD and reduces the execution time. Weighted logic locking is a generic method and can be merged with any of the existing methods and thereby gain advantages.


    Access

    Check access

    Check availability in my library

    Order at Subito €


    Export, share and cite



    Title :

    Weighted Logic Locking to Increase Hamming Distance against Key Sensitization Attack


    Contributors:


    Publication date :

    2019-06-01


    Size :

    1196905 byte




    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English



    FDA-MIMO Beampattern Synthesis with Hamming Window Weighted Linear Frequency Increments

    Ming Tan / Chunyang Wang / Hui Yuan et al. | DOAJ | 2020

    Free access


    A Hamming Distance and Spearman Correlation Based Star Identification Algorithm

    Samirbhai, Mehta Deval / Chen, Shoushun / Low, Kay Soon | IEEE | 2019


    Modelling Polyfont Printed Characters with HMMs and a Shift Invariant Hamming Distance

    Elms, A. J. / Illingworth, J. | British Library Conference Proceedings | 1995


    Performance of Distance Relay Against Cyber Attack in Transmission Lines

    Gupta, Nitin Kumar / Gangolu, Suryanarayana | IEEE | 2024