The rising popularity of planar transformers (PTs) in isolated power converters for applications such as electrified transportation and electric vehicle (EV) chargers is driven by their compact design, high power density, and precise manufacturing. However, traditional PTs suffer from elevated interwinding and intrawinding capacitances due to the extensive surface overlap in their flat winding structure. This high parasitic capacitance can lead to voltage overshoot, ringing, and reduced noise immunity, impacting the converter’s regulation capability. To address these challenges and optimize PT performance for higher frequencies, a new co-PT (CPT) is introduced. The CPT minimizes surface overlap by siting the primary and secondary windings on the same plane, leveraging an ultraflat conductor thickness. This design reduces both inter- and intrawinding capacitances without compromising winding area or interleaving of layers. This article explains the proposed CPT structure and presents design examples to illustrate its effectiveness. Three types of PTs from existing literature are used for benchmarking and comparison with the proposed CPT. Impedance measurements reveal a substantial reduction in winding capacitance through the proposed CPT, reaching approximately 18 times lower stray capacitance. Experimental testing with a 5-kW isolated dual-active bridge (DAB) converter demonstrates that the proposed CPT outperforms other configurations in terms of power efficiency, ringing noise, and voltage overshoot. Importantly, the enhanced performance is achieved without increasing build material costs.
A Co-Planar Transformer With Ultralow Parasitic Capacitance for EV Chargers
IEEE Transactions on Transportation Electrification ; 10 , 4 ; 9803-9813
2024-12-01
8103014 byte
Article (Journal)
Electronic Resource
English
Online Contents | 1998
Online Contents | 1995